The invention relates to methods and apparatus for addressing memory locations in a random access memory system.
Many conventional computer memory systems have a predetermined number of address lines capable of addressing a plurality of memory locations within a memory unit. For example, an address byte comprising m bits of information on m address lines is capable of addressing 2 Exp(m) memory locations. Thus as memory expansion occurs, more and more address lines are required to address the expanded number of memory locations. However, a particular application program generally does not address all of the memory locations available, and frequently the addressed memory locations are concentrated in specific and often contiguous portions of the available memory space. There has long been a need in the computing sciences to provide rapid access to a large number of memory locations while at the same time, minimizing the number of address lines or bits required to define each memory location. In addition, there has been a need to differentiate between CPU and I/O device memory requests so that identical address bit patterns can address different physical memory locations in accordance with the type of requesting device. The present invention provides a means for rapidly defining and redefining portions of the total memory space which contain a plurality of memory locations which can be identified by the number of address lines available. In addition, the invention provides a means whereby different memory locations can be accessed with the same address bit pattern according to the type of requesting device.